The present invention relates to the field of programmable devices, and the systems and methods for detecting configuration errors in the same. Programmable devices, such as FPGAs, typically include thousands of programmable logic cells that use combinations of logic gates and/or look-up tables to perform a logic operation. Programmable devices also include a number of functional blocks having specialized logic devices adapted to specific logic operations, such as adders, multiply and accumulate circuits, phase-locked loops, and memory. The logic cells and functional blocks are interconnected with a configurable switching circuit. The configurable switching circuit selectively routes connections between the logic cells and functional blocks. By configuring the combination of logic cells, functional blocks, and the switching circuit, a programmable device can be adapted to perform virtually any type of information processing function.
The functions of a programmable device, such as an FPGA, are usually controlled by configuration data stored in a set of configuration RAM cells (CRAM) or configuration memory. The configuration data in CRAM provides the logic signals used to configure the programmable device to implement its intended functions. Typically, the data in CRAM includes values of look-up tables defining the functions of logic cells; values of control signals for multiplexers and other switching devices used by the configurable switching circuit to route signals between inputs, outputs, logic cells, and functional blocks; and values specifying other aspects of the configuration of the programmable device, such as modes of operation of the programmable device and its assorted functional blocks and logic cells. A copy of the configuration data is typically stored in a non-volatile memory, such as flash memory or ROM, that is within the same chip package as the programmable device or on an external configuration device connected with the programmable memory device. This copy of the configuration data is loaded into the CRAM cells of the programmable device to configure the programmable device to implement the desired functionality.
As the physical dimensions of CRAM cells decrease due to advances in manufacturing processes, the CRAM cells become more susceptible to spontaneous “soft errors.” Soft errors may be induced by background radiation, such as alpha particles or cosmic rays, and result in CRAM cells spontaneously changing state from “0” to “1” or vice versa. As the function of the programmable device is determined by the data stored in CRAM cells, even a single change in a CRAM cell's state can change or disable the functions of the programmable device. Additionally, as programmable devices become more complicated and require additional CRAM cells to store their configuration data, the frequency of soft errors increases as well.
Previous solutions to soft errors include error detection circuitry on the programmable device that reads the configuration data from CRAM and generates corresponding error detecting codes. Upon the detection of an error, the error detection circuitry will typically raise an error signal that causes the programmable device to reload its configuration data and be reconfigured for correct operation. In another approach, the configuration data can also include error correcting codes. In conjunction with error detection and correction circuitry, these error correcting codes can be used to correct configuration data in the CRAM without reloading the entire set of configuration data. During the reloading or correcting of configuration data, the programmable device suspends its normal operations.
Many applications effectively do not use large portions of the programmable device's CRAM. For example, a typical application might only use 40% of the CRAM of a programmable device to configure the operation of logic cells, functional blocks, and/or switching circuits that is used by the application. The remaining portion of the CRAM, although set to some logic value, does not affect the functions of the programmable device, as these unused portions of CRAM configure the operation of logic cells, functional blocks, and/or switching circuits that are unused by the application. The portion of the CRAM controlling logic cells, functional blocks, and/or switching circuits that are unused by the application is referred to as an unused portion of the CRAM. Soft errors in unused portions of CRAM are insignificant and should be ignored.
Because error detection circuitry does not distinguish between the used and unused portions of the CRAM, previous programmable devices generally reloaded configuration data upon detection of any error in the CRAM. However, as large portions of the CRAM may be unused by applications of the programmable device, many of these soft errors are “false positives” that have no effect on the functionality of the programmable device. Thus, programmable devices are often unnecessarily reloading configuration data due to false positives, which diminishes the performance of the programmable device due to downtime during the loading of configuration data and increased power consumption from unnecessary loading and storing of configuration data.
It is therefore desirable for an apparatus and method to detect false positive soft errors so as to avoid unnecessary reloading and reconfiguration of programmable devices.